The present disclosure relates to a metal interconnect structure, and particularly to a metal interconnect structure that includes an integrated line and via structure in which the via structure is self-aligned in two independent horizontal directions, and methods of manufacturing the same.
Alignment of a via structure to an underlying metal line is important in order to prevent yield degradation due to undesired electrical opens or undesired electrical shorts that are detected during testing, or reliability issues that arise during the operation of a semiconductor chip due to degradation of electrical contacts. Conventional dual damascene methods do not provide a mechanism to systematically prevent overextension of a via structure to an adjacent underlying metal line. Thus, overlay issues during lithographic patterning of via cavities can result in immediate or potential electrical shorts, and depress the yield and/or cause a reliability failure of a semiconductor chip.